SVT Project

The UNH Silicon Vertex Tracker Project

The UNH Nuclear Physics group will be building a test facility for the Silicon Vertex Tracker (SVT) for CLAS12. The current plan is for the SVT to be build up of 4 concentric layers. Each layer will provide x and y information from two silicon strip detectors, each detector with a different "pitch" for the strips. A scattered particle will thus go through 8 layers of silicon plus the support backing and the detector will provide 4 x,y,z points to compute a track.

Previous work performed at Jlab:

• Status: 2006
  • CLAS-NOTE-2006-010 SVT R&D Progress Report.
  • CLAS-NOTE-2006-013 Simulation of the SVX4 ASICs' Performance
  • CLAS-NOTE-2006-014 Specifications for the Hall B Silicon Vertex Tracker's Prototype Module
  • CLAS-NOTE-2006-021 Two Possible Configurations of the Silicon Vertex Tracker
  • CLAS-NOTE-2006-024 Dead Time Due to the Frequency of Reset and Restore Operations of the SVX4 ASICs
• Status: 2007
  • Laser Test Stand Report FY 07.

A completing solution for tracking in the inner detector is the 'micromegas detector', see: CLAS-NOTE-2007-004

Related Papers

• Silicon Vertex Detectors
• Historical background of development of Silicon detectors
• Short summary of many detector designs
• Description of testing using diode laser
• Useful for studying angle of incidence of laser in tests
• OPAL detector described - heavy in readout electronics and algorithms
• Study of depth and spread of depletion layer using infrared laser light.

• Micromegas Detectors

SVT for CLAS12 - Drawing and Such

Cross Section Drawing of SVT chip

Requirements for Testing

• Laser with wavelength λ~1100 nm to match the band gap energy of silicon.
• The mechanical system should be able to drive a laser system over a box of approximately 1m long and 15cm wide, weighing approximately 1kg. This is what we saw in the JLab electronic room.
• Positioning of the laser in the x-direction much better than 150µm.
  • Motor with high accuracy is needed.
• Laser spot on the surface better than 50 µm.
  • Very high precision motor can be used to keep fiber close to the surface.
  • Also can use an optical lense to focus laser beam onto the surface.
• Pulse length of the laser much less than 132 nsec to match the clock rate of the SVX4 chip (if we want the charge measurement to be meaningful during the test).
• If the efficiency needs to be measured we need to make sure that the laser is not fired when the pulse is be close to the end of the gate, possibly by synchronizing the laser pulser and the SVX4 clock.

Pulsed Laser for Testing

The main principle of the LASER test is the injection of charge into silicon using an infrared LASER.

Test setup at Fermi Lab

• Pulsed LASER for testing silicon strip detectors, which was used for similar purposes at Fermi Lab.
  • This DO Note describes a pulsed LASER setup for testing silicon strip detectors at the Silicon Detector Facility (SiDet) of Fermilab supporting the related projects and, in particular, the DO Silicon Tracker Upgrade. It will be used in the measurements of the efficiency of individual strips and their coupling. The LASER wavelength is 1060 nm, at which the absorption length in silicon is about 2 mm. The LASER setup is capable of producing light pulses with rise time of less than 1 ns, allowing the measurement of charge pulse shaping at individual strips and their capacitive couplings. Due to the high power output of the LASER, safety considerations are included. Also discussed are precautions for the safety of the LASER itself, and how to limit the light to an area smaller than 50,pm of diameter.

Test setup for PHENIX

• NIM article describing the laser test setup for PHENIX. There is also a web page describing the PHENIX test setup. The total cost of the LASER and optics was ~$5000.

CLAS12 Options

• Use BNC Model 6040 Mainframe mainframe with BNL 106C optical module. This is probably most expensive option.
  • The BNC Model 6040 Mainframe can also be found as a second hand product for cheaper price than the original price . But the most of the price of the setup comes from the price of BNL 106C optical module.
• Use BNC Model 6040 Mainframe mainframe with BNL 085 or 065 optical modules. The wavelength of these lasers is shorter, which yields shorter absorbtion length for silicon, leading to concentration of the charge near the surface.
• Use a 670nm wavelength laser diode together with an integrated circuit laser driver described in the note by Amrit's group. This diode also provides maximum of 670nm wavelength for the laser light.
  • Although the note states that a laser diode with longer than 670nm wavelength could not be found, there is a web page describing such a laser diode with 980nm wavelength. At this point it is not clear if this diode is actually available in practice and for what price.
• A laser system FSL 500 from a company called PicoQuant based in Germany. This can be used with their laser diode LDH-S-C-1060 which provides light at 1060nm. According to their web site it can be coupled with a singlemode fiber, but the small diameter of the fiber of 10 um is not standart for them, we may end up having to find someone else to couple a fibre for us. The FSL-500 mainframe itself would cost us $13000, while the laser head is $11000, which is kind of steep for a diode. At this point it is otn clear what advantages this diode has over othe cheaper laser diodes (see below).
• A laser diode QFLD-1060-10S from QPhotonics at 1060nm wavelength at typical power of 10mW, which costs about $300, is another option. This company is currently located in Virginia, moving to Michigan. The diode can be driven by an AVO-9E-B Avtech laser diode driver, which would satisfy our requirements and costs about $10,000. The power statibility within 12 hours of operation is RMS~1%. The lifetime for QFLD-1060-10S is 10000 hrs, after which the power may be reduced by ~20%. There are other diodes available as well:
  • QFBGLD-1060-30PM diode at 1060nm would provide typical power of 30mW in 10000 hours, costs $1,690.00 .
  • QFBGLD-1080-2 diode at 1080 nm provides typical power of 2mW for 50000 hours, costs $990.00.

Rail and Support System

• The rail and support system will be based on three moving stages: one to scan across the silicon chip (x-stage), the other to focus the laser (z-stage), and the third one to move the laser to scan the chip at a different position.
• Amrit's group had a prototype which included x and z statges, plus some railings designed to move them. This will serve as the starting point for the UNH design. The motor for x-motion was Zaber Technlogies T-LLS275 (or equivalent model), and the motor for z-motion was Zaber NA11B60.
• One alternative is to use T-LLS275 (or equivalent model)as the y-stage, but get a new and smaller motor for x-motion since 25 cm range provided by T-LLS275 is probably too big anyway. The range and the precision of other Zaber motors might be better matched for scanning the wafer across than the relatively large T-LLS275.
• Another good option is to order all three axis assembled from a single company Velmex, Inc. The only problem I encountered with them is that they would like to build the assembly using the same type of slides without mixing different slide families, which may not be a problem but an inconvenience. Aparently the mixing drives the cost up because of various mecahnical adapters needed to match parts from different families. This option would be really nice and it would cost about $8000.

Very Brief Notes from the Wednesday Bi-weekly Tracking Meetings

• Tracking Meeting on 18 July 2007
• Tracking Meeting on 01 August 2007
• Tracking Meeting on 15 August 2007

Available Hardware

Our own

• Dell Workstation 9200 for the SVT Test with a monitor.
• QPhotonics Laser diode QFBGLD-1080-2 diode at Λ=1080 nm and maximum power 5mW coupled to a single mode fiber (see the spec-sheet for this diode).